1. Field of the Invention
The invention generally relates to a signal processing method in read channels, and in particular to an error correction method in full response read channels.
2. Description of the Related Art
Optical storage systems sometimes use analog peak detection to perform data processing. However, when the recording density of the storage medium increases, the analog peak detection becomes less reliable. This is because ISI (Inter-Symbol Interference) occurs among sequential bits when the bandwidth of the read channel is lower than the bandwidth of the transmitted signals. Serious ISI results in timing jitters. Therefore, as the recording density increases, ISI causes serious timing jitters that make phase locking more difficult.
Information codes can be recorded on disks in various formats, such as NRZ (Non-Return-to-Zero) and NRZI (Non-Return-to-Zero-Inverse). The recording format of DVD disks is the NRZI format. In CD/DVD storage systems, there are usually two different structures in read channels in the prior art. They are the PRML (Partial Response Maximum Likelihood) channel and the full response channel. Although the PRML channel can increase the recording density, this method requires perfect equalization of the channel signals so that the shape of the channel signals matches a predetermined PR (Partial Response) target waveform. Furthermore, ISI can not be removed in the PRML channel. The channel signals are equalized to provide a target pulse waveform, and the target pulse waveform has default values at specific sampling points. The ISI on the target pulse waveform is controlled into an expected form and is combined into a pulsed detection method. Such a method determines the occurrence of signal pulses.
In addition, the PRML channel requires ML (Maximum Likelihood) detection to restore correct data from sampled signals in each pulse cycle. The ML detection is usually implemented by a Viterbi detector. The Viterbi detector is a device using the Viterbi algorithm invented by Andrew Viterbi in 1967. Using the Viterbi detector in a PRML channel is well known by those who are skilled in the art. In the PRML channel, reproduced signals of a disk are processed by a PR equalizer and a Viterbi detector.
With reference to FIG. 1, it shows a block diagram of the Viterbi detector. The Viterbi detector primarily includes a Branch Metrics Computing Circuit 10, an Add/Compare/Select Circuit 11, and a Path Memory Unit 12. The Branch Metrics Computing Circuit 10 receives and computes an equalizer output signal J from an equalizer (not shown) in an optical storage system with at least one non-zero equalization target value, such as four equalization target values {0, 0.25, 0.75, 1}, to generate branch metrics B0001, B0002, B0011, B0111, B1001, B1101, B1111, and B1112. The branch metrics at each time are B0001=B0002=(0-J)2, B0011=B1001=(0.25-J)2, B0111=B1101=(0.75-J)2, B1111=B1112=(1.0-J)2, respectively. Therefore, the Branch Metrics Computing Circuit 10 comprises four subtractors, four multipliers, and four buffers. The subtractors are used to compute J-0, J-0.25, J-0.75, and J-1. And the multipliers are employed to compute the squares. Then, the computed results are stored in the buffers. The branch metrics represent the similarity between the equalization output signals processed by the equalizer and the ideal equalized signals. Moreover, the Add/Compare/Select Circuit 11 uses the branch metrics B0001, B0002, B0011, B0111, B1001, B1101, B1111, and B1112 to perform addition, comparison, and selection. Then, the Add/Compare/Select Circuit 11 generates path control signals H000 and H111. Further, the Path Memory Unit 12 is controlled by the path control signals H000 and H111 to output detector signals.
Since the Branch Metrics Computing Circuit 10 and Add/Compare/Select Circuit 11 of the Viterbi detector in the PRML channel involve floating operations, the hardware circuit design has to take the number of bits into account for floating numbers. This directly complicates the design of the subtractors, multipliers, adders, and comparators and increases the required area of the VLSI.
In a full response read channel 20 as shown in FIG. 2, reproduced signals obtained from a recording medium 6 by a light signal reading system (not shown) are sent to an equalizer 1. Then the signals are sent through a data slicer 2, a PLL (Phase Lock Loop) 3, and a sampler 4 to produce NRZI signals to EFM Plus Demodulator 7. Sometimes, errors in the NRZI signals can be readily checked by the RLL (Run Length Limited) codes. The RLL codes have two constraints d and k, which define the minimum and maximum run-lengths of continuous 1 and 0 in the data stream. In particular, d constraint is used to control high frequency contents of the data stream while k constraint is used to control low frequency contents. Therefore, the RLL codes eliminate a lot of transitions in data transmissions. Signals in full response read channels can be restored without interference. That is, the signal processing in a full response read channel is not influenced by ISI at all.
FIG. 3 shows an example of reproduced signals that contain errors. It shows the relations among data codes, recorded data waveforms, corresponding optical disk pits, ideal reproduced signals, ideal NRZI, actually reproduced signals, and actual NRZI. In the actual NRZI signals, errors occurring at points a and c can be readily detected because the signals at points a and c violate the RLL codes.
Generally, there are two types of errors that occur in data transmission, storage, and restoration. The first type is random error. It occurs in a single bit when the bit is replaced with the corresponding value. The second type is burst error. It occurs in a continuous series of bits. The length and frequency of the burst error may be random or regular. In either type, the occurrence of errors is usually determined according to the storage medium or channel being used. Thus, it is hard to list all conditions that violate the RLL codes if one uses a table to implement error corrections.
The EFM Plus Demodulation requires that no transitions, i.e. pit-to-land or land-to-pit transitions, occur between 2 and 10 bits of interval. These limits of continuous run-lengths are usually expressed as RLL constraints (d,k)=(2,10). If the RLL codes are utilized, some errors in NRZI signals can be corrected before performing the EFM Plus Demodulation to effectively improve system efficiency.